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mpq8623 16v, 6 a, high efficiency , synchronous , step - down converter with adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 1 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. description the mpq8623 is a fully integrated, high - frequency, synchronous , buck converter. the mpq8623 offers a very compact solution that achieve s up to 6a of output current with excellent load and line regulation over a wide input supply range. the mpq8623 operate s at high efficiency over a wide output current load range. the mpq8623 adopts an internally compensated constant - on - ti me (cot) control that provides fast transient response and eases loop stabilization. the operating frequency can be set to 600 k hz, 1100 k hz , or 2000 k hz easily with mode configuration, allowing the mpq8623 frequency to remain constant regardless of the input and output voltages. the output voltage sta rt - up ramp is controlled by an internal 1.5ms timer , which can be increased by adding a capacitor on trk/ref. an open - drain power good (pgood) signal indicates if the output is within its nominal voltage range. pgood is clamped to around 0.7v with an external pull - up voltage when the input supply fails to power the mpq8623. full protection features include over - current protection ( ocp ) , over - voltage protection ( ovp ) , under - voltage protection ( uvp ), and over - temperature protection ( otp ) . the mpq8623 re quires a minim al number of readily available, standard, external components and is available in a qfn - 14 ( 2mmx3mm ) package. features ? wide input voltage range o 2. 85 v to 16v with external 3.3v vcc bias o 4v to 16v with internal vcc bias or external 3.3v vcc bi as ? 6a output current ? programmable accurate current limit level ? low r ds (on) integrated power mosfets ? proprietary switching loss reduction technique ? adaptive constant - on - time ( cot ) for ultrafast transient response ? stable with zero esr output capacitor ? 0.5 % reference voltage over 0 c to + 70 c junction temperature range ? 1 % reference voltage over - 4 0 c to +125 c junction temperature range ? selectable forced ccm or pulse - skip operation ? excellent load regulation ? output voltage tracking ? output voltage discharge ? p good active clamped at low level during power failure ? programmable soft - start time from 1.5ms and up ? pre - bias start - up ? selectable switching frequency from 600 k hz, 1100 k hz , and 2000 k hz ? latch - off for ocp, ovp, uvp, otp , and uvlo ? output adjustable from 0.9v to 0.9 x v in up to 6v max ? available in a qfn - 14 ( 2mmx3mm ) package applications ? telecom and networking systems ? servers , cloud - computing, storage ? base stations ? general purpose point - of - load (pol) ? 12v distribution power systems ? high - end tv ? game consoles and graphic cards all mps parts are lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit the mps website under quality assurance. mps and the future of analog ic technology are registered tradem arks of monolithic power systems, inc.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 2 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. typical application e n f b b s t v i n p g o o d s w v i n m p q 8 6 2 3 v o u t v c c a g n d c s p g n d c i n c v c c c 3 l 1 r 1 r 2 c o u t c 1 e n p g r c s t r k / r e f m o d e c r e f
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 3 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. ordering information part number* package top marking mpq8623 gd qfn - 14 (2mmx3mm) see below * for tape & reel, add suffix C z ( e. g. MPQ8623GD C z) top marking arm: product code of MPQ8623GD y: year code ww: week code lll: lot number package reference top view qfn - 14 (2mmx3mm) m o d e b s t s w v i n p g n d v c c p g n d p g o o d t r k / r e f e n a g n d c s 1 2 3 4 5 1 2 1 0 9 8 6 7 1 4 1 3 f b s w 1 1
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 4 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. absolute maximum rat ings (1) supply voltage ( v in ) ................................ .... 18v v sw(dc) ................................ . - 0.3 v to v in + 0.3v v sw (25ns) (2) ................................ ..... - 3 v to 25v v sw (25ns) ................................ ......... - 5 v to 25v v bst ................................ ..................... v sw + 4v v cc , en ................................ ................... 4 .5 v all other pins ................................ . - 0.3v to 4.3 v junction temperature ............................... 170 c lead temperature ................................ .... 260 c storage temperature ................ - 65 c to +170 c recommended operating condition s (3) supply voltage (v in) .......................... 4v to 16 v v in(dc) - v sw(dc) (4) ................. - 0.3v to v in + 0.3v v sw(dc) ( 5 ) ............................. - 0.3v to v in + 0.3v output voltage (v out ) ........................ 0.9v to 6v external vcc bias (v cc_ext ) ......... 3.12v to 3.6v maximum output current (i out_max ) ................. 6a maximum output current limit (i oc_max ) ........... 8a maximum peak inductor current (i l_peak ) ...... 10a en voltage (v en ) ................................ ......... 3.6v operating junction t emp . (t j ). .. - 40 c to +125 c thermal resistance (6) j b jc _top qnf - 14 (2mmx3mm) ........... 6.8 ..... 17.4 ... c/w notes : 1) exceeding these ratings may damage the device. 2) measured by using a differential oscilloscope probe. 3) the device is not guaranteed to function outside of its operating conditions. 4) the voltage rating can be in the range of - 5 v to 24v for a period of 25ns or less with a maximum repetition rate of 2mhz when the input voltage is 16v. 5) the voltage rating can be in the range of - 3v to 24v for a period of 25ns or less with a maximum repetition rate of 2mhz when t he input voltage is 16v . 6) jb is the thermal resistance from the junction to the board around the pgnd soldering point. jc_top is the thermal resistance from the junction to the top of the package.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 5 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. electrical character istics v in = 12v, t j = - 40 c to 125 c, unless otherwise noted. parameters symbol condition min typ max units v in supply current supply current ( shutdown ) i in v en = 0v 0 10 a supply current (quiescent ) i in v en = 2v, v fb = 1v 6 50 850 a mosfet switch leakage sw lkg _hs v en = 0v, v sw = 0v 0 10 a sw lkg _l s v en = 0v, v sw = 12 v 0 30 hs on - state resistance r ds_on_hs v en = 2 v @ 25 c 22.6 m ls on - state resistance r ds_on_l s v en = 2 v @ 25 c 8.1 m current limit current limit threshold v lim 1.15 1.2 1.25 v i cs to i out ratio i cs /i out i out 2a 36 40 44 a/a low - side negative current limit i lim_neg_10 - 8 a negative current limit time - out (7) t ncl_timer 80 ns timer switching frequency ( 8 ) f sw v out =1v 5 30 6 6 0 79 0 khz v out =1v 935 1100 1265 khz v out =3.3 v 1870 2 2 00 2530 khz minimum on time ( 7 ) t on _min 50 ns minimum off time ( 7 ) t off _min v fb = 1000mv 180 ns over - voltage (ovp) and under - voltage protection (uvp) ovp threshold v ovp 113% 116% 119% v ref uvp threshold v uvp 77% 80% 83% v ref feedback voltage and soft start (ss) feedback voltage v ref t j = - 40 c to +125 c 891 900 909 mv t j = 0 c to +70 c 895 900 905 mv trk/ref sourcing current i track_source v trk/ref = 0v 15 a trk/ref sinking current i track_sink v trk/ref = 1v 6 a soft - start time t ss c track = 1nf 1 1.5 ms error amplifier (ea) error amplifier offset v os - 3 0 3 mv feedback current i fb v fb = ref 50 100 na enable (en) e nable input rising threshold vih en 1.17 1.22 1.27 v e nable hysteresis v en - hys 200 mv e nable input current i en v en = 2v 0 a soft shutdown discharge fet r on_disch 80 ? vin uvlo vin under - voltage lockout threshold rising v in vth - rise v cc = 3.3v 2.25 2.55 2.85 v vin under - voltage lockout threshold falling v in vth - fall 1.7 2 2.3 v
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 6 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. electrical character istic s (continued) v in = 12v, t j = - 40 c to + 125 c, unless otherwise noted. parameters symbol condition min typ max units vcc regulator vcc under - voltage lockout threshold rising v cc vth _r ise 2.65 2.8 2.9 5 v vcc under - voltage lockout threshold falling v cc vth_fall 2.35 2.5 2.65 v vcc output voltage v cc 2. 88 3.00 3. 12 v vcc load regulation i cc = 25ma 0.5 % power good (pgood) power good high threshold pg vth_hi_rise fb from low to high 89 .5 % 92.5% 95 .5 % v ref power good low threshold pg vth_lo_rise fb from low to high 113% 116% 11 9 % v ref pg vth_lo_fall fb from high to low 77% 80% 83% v ref power good low - to - high delay pg td t j = 25 c 0. 7 1 1. 3 ms power good sink current capability v pg i pg = 10ma 0. 5 v power good leakage current i pg_leak v pg = 3v 3 a power good low - level output voltage v ol_100 v in = 0v, pull pgood up to 3.3v through a 100k resistor 650 850 mv v ol_10 v in = 0v, pull pgood up to 3.3v through a 10k resistor 800 1000 thermal protection (otp) otp shutdown ( 7 ) t sd 150 160 c otp shutdown hysteresis ( 7 ) t sd _hys 20 c note s : 7) specified by design and characterization. not production tested. 8) specified by design.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 7 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. typical performance characteristics v in = 12v, v out = 1.8v, l = 1 h, t a = +25 c, unless otherwise noted.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 8 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. typical performance characteristics (continued) v in = 12v, v out = 1.8v, l = 1 h, t a = +25 c, unless otherwise noted.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 9 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. typical performance characteristics (continued) v in = 12v, v out = 1.8v, l = 1 h, t a = +25 c, unless otherwise noted.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 10 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. typical performance characteristics (continued) v in = 12v, v out = 1.8v, l = 1 h, t a = +25 c, unless otherwise noted.
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 11 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. pin functions pin # name description 1, 14 p gnd system ground. pgnd is the reference ground of the regulated output voltage. pgnd requires careful consideration during pcb layout. connect using wide pcb traces. 2, 11 sw switch output. connect sw to the inductor and bootstrap capacitor. sw is driven up to vin by the high - side switch during the on - time of the pwm duty cycle. the inductor current drives sw low during the off - time. connect using wide pcb traces. 3 vin input voltage. vin supplies power for the internal mosfet and regulator. input capacitors are needed to decouple the input rail. connect using wide pcb traces. 4 cs current limit. connect a resistor to ground to set the current limit trip point. see table 2 for additional details. 5 en enable . en is an input signal that turns the regulator on or off. drive en high to turn on the regulator ; drive en low to turn off the regulator. connect en to v in through a pull - up resistor or a resistive voltage divider for automatic start - up. do not float en. 6 fb feedback. an external resistor divider from the output to agnd tapped to fb sets the output voltage. it is recommended to place the resistor divider as close to fb as possible. vias should be avoided on the fb traces. 7 agnd analog g round. select agnd as the control circuit reference point. 8 trk/ref external tracking voltage input. the output voltage tracks this input signal. decouple trk/ref with a ceramic capacitor as close to it as possible . ceramic capacitors with x7r or x5r grade dielectric s are recommended for their stable temperature characteristics . the capacitance of this capacitor determines the soft - start time. see equation 2 and 3 for additional details. 9 pgood power good output. pgood is an open - drain signal. a pull - up resistor connected to a dc voltage is required to indicate a logic high signal if the output voltage is within regulation . there is a delay of about 1ms from the time fb 92.5% and pgood pull ing high. 10 bst bootstrap. connect a capacitor between sw and bs to form a floating supply across the high - side switch driver. 12 mode operation mode selection . program mode to select ccm, pulse - skip mode, and the operating switching frequency. see table 1 for additional details. 13 vcc internal 3v ldo output. the driver and control circuits are powered from the vcc voltage. decouple vcc with a minimum 1 f ceramic capacitor as close to it as possible . ceramic capacitors with x7r or x5r grade dielectric s are recommended for their stable temperature characteristics .
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 12 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. block diagram figure 1 : functional block diagram v c c e n r e f e r e n c e 3 v l d o s y s t e m m o n i t o r m o d e s e l e c t t r k / r e f f b e r r o r a m p l i f i e r p w m c o m p a r a t o r p g o o d c o m p a r a t o r p g o o d r a m p o n t i m e r m o d e h s d r i v e r l s d r i v e r s w l o g i c c o n t r o l b s t r e g b s t i n p g n d v a l l e y c u r r e n t l i m i t & z c d h s g h s g l s g l s g c s z c d x s x r q o f f t i m e r o v d e t e c t c o m p a r a t o r u v d e t e c t c o m p a r a t o r x l i m f a u l t o v _ t h u v _ t h o v _ t h u v _ t h a g n d
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 13 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. operation constant - on - time ( c ot ) control the mpq8623 employs constant - on - time (cot) control to achieve fast load transient response. figure 2 shows the details of the control stage of the mpq8623 . the operational amplifier (amp) corrects any error voltage between fb and vref. the mpq8623 can use amp to provide excellent load regulation over the entire load range whether it is operat ing in forced continuous conduction mode ( ccm ) or pulse - skip mode. the dedicated vsns pin helps provide the feature of the differential output voltage remote sense. the pair of the remote sense trace should be kept at a low impedance to achieve the best perfo rmance. the mpq8623 has internal ramp compensation to support low esr mlcc output capacitor solution s . the adaptive internal ramp is optimized so that the mpq8623 is stable in the entire operating input/output voltage range with proper design of the outp ut l/c filter. figure 2 : cot control pwm operation figure 3 shows how the pulse - width modulation ( pwm ) signal is generated. amp corrects any error between fb and ref and generates a fairly smooth dc voltage (comp). the internal ramp is superimposed onto comp. the superimposed comp is compared with the fb signal. whenever fb drops below the superimposed comp, the integrated high - side mosfet (hs - fet) is turned on and remains on for a fixed turn - on time. the fixed on time i s determined by the input voltage, output voltage , and selected switching frequency. after the on period elapses, the hs - fet turn s off. the hs - fet turn s on again when fb drops below the superimposed comp. by repeating this operation, the mpq8623 regulates the output voltage. the integrated low - side mosfet (ls - fet) t urn s on when the hs - fet is in its off state to minimize conduction loss. a dead short occurs between vin and pgnd if both the hs - fet and the ls - fet are turned on at the same time (shoot - through). in order to avoid a shoot - through, a dead time (dt) is generated internally between the hs - fet off and the ls - fet on period or the ls - fet off and the hs - fet on period . figure 3 : heavy - load o peration (pwm) ccm operation continuous conduction mode (ccm) occurs w hen the output current is high and the inductor current is always above zero amps (see figure 3 ). the mpq8623 can also be configured to operate in forced ccm operation when the output current is low . see the mode se lection section on page 14 for details. in ccm operation, the switching frequency is fairly constant (pwm mode), so the output ripple remains almost constant throughout the entire load range. pulse - skip operation at light - load condition, the mpq8623 can be configured to work in pulse - skip mode to optimize efficiency. when the load decreases, the inductor current decrease s as well. once the inductor current reaches zero, the mpq8623 transitions from ccm to pulse - skip mode i f the mpq8623 is configured in this way . see the mode selection section on page 14 for details. a d a p t i v e r a m p o n t i m e r p w m c o m p + v r e f f b p w m c o m p a r a t o r a g n d a m p v s e n s + v s e n s - + l c o u t v i n p g n d s w h s f e t l s f e t p w m r e f r a m p f b c o m p t o n h s - f e t d r i v e r l s - f e t d r i v e r i l i o
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 14 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. figure 4 shows pulse - skip mode operation at light - load condition . when fb drops below the superimposed comp, the hs - fet turns on for a fixed interval. when the hs - fet turns off, the ls - fet turns on until the inductor current reaches zero. in pulse - skip mode operation, fb does not reach the superimposed comp when the inductor current approaches zero. the ls - fet driver turns into tri - state (high - z) when the induct or current reaches zero. a current modulator takes over the control of the ls - fet and limits the inductor current to less than - 1ma. therefore , the output capacitors discharge slowly to pgnd through the ls - fet. at light - load condition, the hs - fet is not turned on as frequently in pulse - skip mode as it is in forced ccm. as a result, the efficiency in pulse - skip mode is improved greatly compar ed to that in forced ccm operation. figure 4 : pulse skip in light load as the o utput current increases from the light - load condition, the time period the current modulator regulates in becomes shorter. the hs - fet is turned on more frequently , and the switching frequency increases accordingly. the output current reaches critical level s when the current modulator time is zero. the critical level of the output current can be determined with equation (1): (1) where f sw is the switching frequency. the mpq8623 enters pwm mode once the output current exceeds the critical level. after ward , the switching frequency remains fairly constant over the output current range. the mpq8623 can be configured to operate in forced ccm even in light - load condition ( see table 1 ) . mode selection the mpq 8623 provides both forced ccm operation and pulse - skip operation in light - load condition. the mpq 8623 has three options for switching frequency. selecting the operation mode under light - load condition and the switching frequency is done by choosing the resistance value of the resistor connected between mode and agnd or vcc (see table 1). table 1 : mode selection mode light - load mode switching frequency agnd forced ccm 1100 k hz 30.1k? (20%) to agnd forced ccm 2000 k hz 60.4k? (20%) to agnd forced ccm 600 k hz 121k? (20%) to agnd pulse skip 600 k hz 243k? (20%) to agnd pulse skip 2000 k hz vcc pulse skip 1100hz soft start (ss) the minimum soft - start time is limited to 1 .5 ms. this can be increased by choosing the capacitance between trk/ref and agnd. a minimum value of 3.3nf for this capacitor is always required to stabilize the reference voltage. the capacitance of this capacitor can be determined with equation (2) and equation (3) : (t ss = 1.5ms) (2) ( t ss > 1.5ms) (3 ) p w m r e f r a m p f b c o m p t o n h s - f e t d r i v e r l s - f e t d r i v e r i l i o in sw out out in out v f l 2 v ) v v ( i ? ? ? ? ? ? 17 ~ 3 . 3 ) ( ? nf c ref v a ms t nf c ss ref 9 . 0 10 ) ( ) ( ? ? ?
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 15 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. output voltage tracking and reference the mpq8623 provides an analog input pin (trk/ref) to track another power supply or accept an external reference voltage . when an external voltage signal is connected to trk/ref, it acts as a reference for the mpq8623 output voltage. the fb voltage follows this external voltage signal exactly , and the soft - start settings are ignored. the trk/ref input signal can be in the r ange of 0.3v to 1.4v. during the initial start - up, the trk/ref must reach 900mv or above first to ensure proper operation. after ward , trk/ref can be set to any value between 0.3v and 1.4v. pre - bias start - up the mpq8623 has been designed for monotonic sta rt - up into pre - biased loads. if the output is pre - biased to a certain voltage during start - up, the ic disables switching for both the hs - fet and ls - fet until the voltage on the trk/ref capacitor exceeds the sensed output voltage at fb. before the trk/ref v oltage reaches the pre - biased fb level, if the bst voltage (from bst to sw) is lower than 2.3v, the ls - fet is turned on to allow the bst voltage to be charged through vcc. the ls - fet is turned on for very narrow pulses, so the drop in the pre - biased level is negligible. output voltage discharge when the mpq8623 is disabled through en, the output voltage discharge mode is enabled . this causes both the hs - fet and the ls - fet to latch off. a discharge fet connected between sw and pgnd is turned on to discharg e the output voltage. the typical switch on resistance of this fet is about 80. once the fb voltage drops below 10%*ref, the discharge fet is turned off. current sense and over - current protection (ocp) the mpq8623 features an on - die current sense and a programmable positive current limit threshold. the current limit is active when the mpq8623 is enabled. during the ls - fet on state, the sw current (inductor current) is sensed and mirrored to cs with the ratio of g cs . by using a resistor (r cs ) from cs to agnd, the v cs voltage is proportional to the sw current cycle - by - cycle. the hs - fet is only allowed to turn on when the v cs voltage is below the internal ocp voltage threshold ( v ocp ) during the ls - fet on state to limit the sw valley current cycle - by - cycle. calculate the current limit threshold setting from r cs with equation (4) : ( 4 ) where v ocp = 1.2 v, g cs = 40 a/a, and i lim is the desired output current limit. if the mpq8623 detects an over - current condition for 31 consecutive cycles, or if fb drops below the under - voltage protection (uvp) threshold, it latches off. a power recycl ing of vcc or en is needed to enable the part again. there is some offset for the low current limit threshold setting. refer to table 2 for a more accurate setting. table 2: threshold setting l lim_dc (a) r cs (k ? ) 8 3.83 7.5 4.02 7 4.32 6.5 4.64 6 4.87 5.5 5.49 5 5.9 4.5 6.49 4 7.15 negative inductor current limit when the ls - fet detects a - 8 a current, the mpq8623 turns off the ls - fet for 200ns to limit the negative current. output sinking mode (osm) the mpq8623 employs output sinking mode (osm) to regulate the output voltage to the targeted value. when the fb voltage is higher than 105%*ref b ut is below the ovp threshold, osm is triggered . during osm operation, the ls - fet remains on until it reaches the - 4 a negative current limit. the ls - fet is then turned off momentarily for 80 ns and is turned on again. the mpq8623 repeats this operation until fb drops below 102%*ref. the mpq8623 exits osm after 15 consecutive cycles of forced ccm. ocp cs in o o cs lim in s v r ( ) (v v ) v 1 g (i ) v 2 l f ?? ?? ? ? ? ??
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 16 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. over - v oltage protection (ovp) the mpq8623 monitor s the output voltage by connecting fb to the tap of the output voltage feedback resistor divide r to detect an over - voltage condition . this provides latch - off ovp mode. if the fb voltage exceeds 116% of the ref voltage, the mpq8623 enters latch - off ovp mode. the hs - fet latches off and pgood latches low until the power of vcc or en are recycle d . meanwhile, the ls - fet remains on until it reaches the low - side negative current limit (nocp). the ls - fet is then turned off momentarily for 80 ns and is turned on again. the mpq8623 repeats this operation to bring down the output voltage. when the fb voltage drops below 50% of the ref voltage, the ls - fet is turned off for pulse - skip mode and continues turning on for forced ccm operation. if fb rises back to more than 116% of the ref voltage, the ls - fet turns on again with nocp until fb drops back below 50% of the ref voltage. the power of en or vin must be recycle d to clear the ovp fault. the ovp function is enabled after trk/ref reaches 900mv. over - temperature protection (otp) the mpq8623 has over - temperature protection (otp) . the ic monitor s the junct ion temperature internally . if the junction temperature exceeds the threshold value ( typically 160 c), the converter shuts off. this is a latch - off protection. the power of vcc or en must be recycle d to enable the mpq8623 again. output voltage setting and remote output voltage sensing first, choose a value for r1. then r2 ca n be determined with equation (5 ): (5) where v ref = 900mv . to optimize the load transient response, a feed - forward capacitor (c ff ) is recommended to be in parallel with r1. r1 and c ff add an extra zero to the system, which improves loop response. r1 and c ff are selected so that the zero formed by r1 and c ff is located around 20khz~60khz. f z can be determined with equation (6 ): (6 ) power good (pgood) the mpq8623 ha s a power good (pgood) output. pgood is the open - drain of a mosfet. c onnect pgood to v cc or another external voltage source less than 3.6v through a pull - up resistor (10 k?, typically ). after applying the input voltage, the mosfet turn s on, so pgood is pulled to gnd before trk/ref is ready. after the fb voltage reaches 92.5 % of the ref voltage, pgood is pulled high after a 0.8ms delay. when the fb voltage drops to 80 % of the ref voltage or exceeds 116 % of the no minal ref voltage , pgood is latched low. pgood can only be pulled high again after a new ss. if the input supply fails to power the mpq8623 , pgood is clamped low , even though pgood is tied to an external dc source through a pull - up resistor. the relationship between the pgood voltage and the pull - up current is shown in figure 5 . figure 5 : pgood clamped voltage vs. pull - up current enable ( en ) configuration the mpq8623 turns on when en goes high and turns off when en goes low. en cannot be left floating for proper operation. en can be driven by an analog or digital control logic signal to enable or disable the mpq8623. ref 21 o ref v r (k ) r (k ) vv ? ? ? ? ? z ff 1 f 2 r1 c ? ? ? ?
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 17 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. the mpq8623 p r ovides accurate en thresholds, so a resistor divider (r3/r4 in figure 2) from vin to agnd can be used to program the input voltage at which the mpq8623 is enabled. this is highly recommended for application s where there is no dedicated en control logic signal to avoid possible uvlo bouncing during power - up and power - down. the resistor divider values can be determined with equation (7): (7) where vih en = 1.22v , typical ly. r up and r down should be chosen so that v en does not exceed 3.6v when vin reaches the maximum value. en can also be connected to vin directly through a pull - up resistor (r up ). r up should be chosen so that the maximum current going to en is 50 a. r up can be calculated with equation (8): (8) down down up en start in r r r vih v v ? ? ? ) ( _ ) ( 05 . 0 ) ( ) ( ma v vin k r max up ? ?
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 18 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. application informat ion input capacitor the input current to the step - down converter is discontinuous and t herefore requires a capacitor to supply ac current to the step - down converter while maintaining the dc input voltage. use c eramic capacitors for the best performance. during layout, place the input capacitors as close to v in as possible. the capacitance can var y significantly with temperature. c apacitors with x5r and x7r ceramic dielectrics are recommended because they are fairly stable over a wide temperature range . the capacitors must have a ripple current rating that exceeds the converters maximum input rippl e current. estimate t he input ripple current with equation (9) : ( 9 ) the worst - case condition occurs at v in = 2v out , shown in equation (10) : ( 10 ) for simplification, choose an input capacitor with an rms current rating that exceeds half the maximum load current. the input capacitance value determines the converter input voltage ripple. select a capacitor value that meets any input voltage ripple requirement s. estimate t he input voltage ripple with equation (11) : ( 11 ) the worst - case condition occurs at v in = 2v out , with equation (12) : ( 1 2 ) output capacitor the output capacitor maintain s the dc output voltage. use c eramic capacitors or poscap s . estimate t he output voltage ripple with equation (13) : ( 1 3 ) when using ceramic capacitors, the capacitance dominates the impedance at the switching frequency. the capacitance also dominates the output voltage ripple. for simplification, estima te the output voltage ripple with equation (14) : ( 1 4 ) t he esr dominates the switching frequency impedance for poscap s . for simplification, the output ripple can be approximated with equation (15) : (1 5 ) inductor the inductor suppl ies a constant current to the output load while being driven by the switching input voltage. a larger value inductor result s in less ripple current and lower output ripple voltage , but also has a l arger physical size, a higher series resistance, and a lower saturation current. generally, select an inductor value that allows the inductor peak - to - peak ripple current to be 30 % to 40% of the maximum switch current limit. also design for a peak inductor current that is below t he maximum switch current limit. calculate t he inductance value with equation (16) : ( 1 6 ) where ? i l is the peak - to - peak inductor ripple current. choose an inductor that will not saturate under the maximum inductor peak current. the peak inductor current can be calculated with equation (17) : ( 1 7 ) ) v v 1 ( v v i i in out in out out cin ? ? ? ? 2 i i out cin ? ) v v 1 ( v v c f i v in out in out in sw out in ? ? ? ? ? ? in sw out in c f i 4 1 v ? ? ? ? ) 8 1 ( ) 1 ( out sw esr in out sw out out c f r v v l f v v ? ? ? ? ? ? ? ? ? ) v v 1 ( c l f 8 v v in out out 2 sw out out ? ? ? ? ? ? ? esr in out sw out out r ) v v 1 ( l f v v ? ? ? ? ? ? ) v v 1 ( i f v l in out l sw out ? ? ? ? ? ) 1 ( 2 in out sw out out lp v v l f v i i ? ? ? ? ? ?
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit mpq8623 rev. 1.01 www.monolithicpower.com 19 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. pcb layout guidelines efficient pcb layout is cr itical for stable operation. for the best performance, refer to figure 7 and follow the guidelines below . 1. place the input mlcc capacitors as close to vin and pgnd as possible. 2. place the major mlcc capacitors on the same layer as the mpq8623 . 3. maximize the vin and pgnd copper plane to minimize parasitic impedance. 4. place as many pgnd vias as possible as close to pgnd a s possible to minimize both parasitic impedance and thermal resistance. 5. place the vcc decoupling capacitor close to the device. 6. connect agnd and pgnd at the point of the vcc capacitor's ground connection. 7. place the bst capacitor as close to bst and sw as possible. 8. use traces with a width of 20mil or wider to route the path. 9. use a 0.1f to 1f bootstrap capacitor. 10. place the ref capacitor close to trk/ref to agnd. figure 7 : example of pcb layout (placement & top layer pcb) note: via size is 20/10 mils . s w v o u t v i n p g n d c b s t c i n 1 c i n 2 s w m o d e b s t s w v i n p g n d p g n d c s e n t r k / r e f p g o o d r 1 r 2 1 2 3 4 5 1 2 1 1 1 0 9 8 6 7 1 4 1 3 a g n d f b c f f 1 2 3 4 5 1 2 1 0 9 8 6 7 1 4 1 3 1 1 c r e f v c c c v c c v o u t
mpq8623 C 16v, 6a, high efficiency sync step - down conve rter w / adjustable current limit notice: the information in this document is subject to change without notice. please contact mps for current specifications. users should warrant and guarantee that third party i ntellectual p roperty r ights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mpq8623 rev. 1.0 1 www.monolithicpower.com 20 10/2/2018 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2018 mps. all rights reserved. package information qfn - 14 (2mmx3mm) s i d e v i e w b o t t o m v i e w n o t e : 1 ) l a n d p a t t e r n s o f p i n 1 , 5 , 8 a n d p i n 1 2 h a v e t h e s a m e s h a p e . 2 ) l a n d p a t t e r n s o f p i n 2 , 4 , 9 , 1 0 a n d p i n 1 1 h a v e t h e s a m e s h a p e . 3 ) a l l d i m e n s i o n s a r e i n m i l l i m e t e r s . 3 ) l e a d c o p l a n a r i t y s h a l l b e 0 . 1 0 m i l l i m e t e r s m a x . 4 ) j e d e c r e f e r e n c e i s m o - 2 2 0 . 5 ) d r a w i n g i s n o t t o s c a l e . p i n 1 i d m a r k i n g t o p v i e w p i n 1 i d i n d e x a r e a r e c o m m e n d e d l a n d p a t t e r n p i n 1 i d 0 . 1 0 x 4 5

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